1. Field of the Invention
The invention relates to an analog-to-digital converter and more particularly to a Sigma-Delta analog-to-digital converter having a continuous time filter and/or a discrete time filter and a noise reduction block.
2. Related Art
At present, virtually all communications, radar, EW, cell phone, wireless data, and radio systems today require the function of analog-to-digital conversion, so that the tremendous power afforded by modern digital processing can be taken advantage of fully. As Walden noted in his study in 1999, technological progress as measured by the product of the analog-to-digital conversion resolution (bits) times the sampling rate has been slow over the last decade, especially when compared with the large improvements recently made in the area of Digital Signal Processing (DSP) and Software-Defined Radio (SDR). New developments in multi-format and wideband military and commercial communications systems require a high dynamic range and flexible digitizing system, where the output center frequency and bandwidth can be selected arbitrarily over a very wide range, while minimizing cost and complexity by utilizing a single common RF front end.
Numerous factors, such as thermal noise and clock jitter, may degrade the ideal performance of an analog-to-digital converter (ADC) resulting in a lower signal-to-noise-ratio (SNR) value and higher effective noise figure value. Because of the need to improve the performance of the ADC relative to the improved capabilities of DSP and SDR, various techniques have been tested, where one of the measurements of improved performance is the SNR. The gain of a Sigma-Delta loop in the ADC can be increased to produce subsequent gains in the SNR, but there is, of course, a limit to the amount of gain that can be applied while still maintaining loop stability. Thus, there is a need for an improved ADC to match the large improvements recently made in the area of DSP and SDR using other techniques.